Test circuit for determining I-vs-V curves for a diode-connected nFET. The shunt resistor R2 was chosen from 0.5Ω to 680kΩ, and R3 was selected to keep E23 above 0 (0.5Ω to 150Ω).
In More mess in the the FET modeling lab, I showed I-vs-V plots for NTD5867NL nFETs, both with a fixed power supply and load resistor, and diode connected (Vgs=Vds). But this year, the NTD5867NL FETs were not available from Digikey, so we are getting AOI518 nFETs instead. I decided to try characterizing these with the KL25Z board. If I power the test off the KL25Z board’s 3.3v supply, I can take fairly high currents, as the board uses a NCP1117ST33T3G LDO regulator, which can the spec sheet claims can deliver up to 1A (800mA, if we limit the dropout to 1.2v). I’m only limited by the USB current limit (500mA), to keep the laptop from shutting off the USB port.
I used essentially the same circuit for testing a diode-connected AOI518 nFET as I used for testing the Schottky diodes, but I did not put a capacitor across the FET. (Well, initially I left the 4.7µF capacitor there, but I was noticing changing values that looked like RC charging when I was testing at small currents, so I removed the capacitor.)
Because the 3.3v supply droops if too much current is taken from it, I used the internal 1V bandgap reference to determine the scaling of the analog-to-digital converter on each reading. The voltage VDS is (E20-E21)/(BANDGAP), and the current IDS is (E22-E23)/(R2*BANDGAP).
Voltage vs current for diode-connected nFET. The model that fits the data (above 1µA) is that of subthreshold conduction, even when the current is over 100mA. (click to embiggen)
I get a very good fit to the data (above 1µA) with the subthreshold conduction model (essentially the same as a junction diode, but using n VT instead of VT, where n is determined by the size and shape of the FET). The value of n for this FET seems to be around 830mV/26mV = 32. The circuit models I’ve seen on the web seem to claim that I should be using a saturation-current model for a diode-connected FET, but that model doesn’t fit the data at all.
There is a very clear thermal shift in the curve for the high-current tests. As the transistor warms up the current increases for a given voltage. This is equivalent to the threshold voltage Vthr dropping with temperature. This is consistent with the data sheet, which shows a lower threshold voltage but higher on-resistance (at 10A) at 125° C than at 25° C.
I’m not seeing any evidence of the weird negative resistance that I saw on the NTD5867NL nFETs. (I tried checking the NTD5867NL nFET with the same testing setup as for the AOI518, and it definitely still shows weird behavior between 10 and 30 mA.)
Because large nFETs are often used to switch inductive loads (motors, loudspeakers, inductors in switching regulators, …), they incorporate a “flyback” diode in the FET. Normally, this diode is back-biased and does not conduct, but if an inductive load needs a current and there are no transistors that are on to provide the current, the diode conducts and keeps the output voltage from going too far below ground.
nMOS and pMOS transistors with flyback diodes. If both transistors are off, but the inductor L1 still wants current, it has to come through one of the flyback diodes D1 or D2. They keep the output voltage from going too far outside the rails.
I characterized the flyback diode on the AOI518 nFET the same way as before, now connecting the gate and the source to the higher voltage, and the drain to the lower voltage.
Below about 0.66 V, the flyback diode has a fairly normal exponential current with voltage, but above that it seems to have a linear relationship between current and voltage, with a dynamic resistance of about 180mΩ.
click to embiggen
The red points with the 0.5Ω shunt go up to an amp, which warms the FET enough to change its characteristics—the lower set of points are the warmer set.
I can also use the measurements of the flyback diode with the ½Ω shunt to characterize the LDO voltage regulator on the Freedom KL25Z board:
For currents up to 400mA, the LDO voltage regulator behaves like a 3.332 V source in series with a 55mΩ resistor.
click to embiggen
The data sheet claims that there should only be a 10mV drop in voltage for an 800mA current, and I’m seeing a 290mV drop. The extra drop is not from the LDO misbehaving, but from the USB voltage dropping—one is only supposed to take up to 500mA from a USB supply and the MacBook Pro apparently has a soft knee at 500mA, rather than an abrupt shutoff. I suspect that if I took the full amp for very long, the laptop would shut down the USB port, as it does if the USB 5V is accidentally shorted.