I was trying to rewrite the lab handout for the class-D amplifier yesterday, and I ran into some problems. We were unable to get the same nFET and pFET as last year (at least one of them has been discontinued by the manufacturer), so I ordered other cheap MOSFETs this year. I was going to check out the circuit to make sure that the new FETs worked before the quarter started, but I got swamped with other things and never got around to it. In looking over the specs for the FETs and doing some calculations for the handout, I realized that new nFET (AOI518) has a large input capacitance (about three times as large as last year’s nFET NTD5867NL-1G), and so turning it off with the open-collector output of the comparator chip we bought (LM2903 dual comparator) is likely to be too slow, even with careful design of the pullup resistors. It was tricky enough last year to keep the shoot-through current short enough to avoid heating the transistors too much. It probably doesn’t help that the pFET we’re using this year (IRFU9024NPBF) has a small gate capacitance, and so can be turned on quickly. We will have one transition with almost no overlap (pFET turning off, nFET turning on), and one with a large overlap (pFET turning on, nFET turning off).
I’m a little confused by the data sheets, because the input capacitance seems to vary much more between FETs than the gate charge does, so I’m not sure exactly what the input capacitance means. For example, at VGS of 4.5v, the total gate charge of the AOI518 is typically 8.8nC, while for the NTD5867NL it is 7.7nC, a much smaller ratio than the 1187pF vs 675pF for ICSS. If the gate charge is really what matters (and I think it is), then we may not be in as big a trouble as I feared, though we still have problems with how long it takes to turn off the nFET.
The design we used last year had pullup resistors for the open-collector comparator output, which drove the FET gates directly:Note that the equivalent circuit for the open-collector outputs has an impedance that is essentially the pullup resistor for both pulling up and pulling down, and Rn needs to be made fairly large in order to ensure that the nFET is turned completely off. This means that the RC time constant for discharging the nFET gate is quite large and so the nFET is turned off slowly. If we limit the power supply to ±7v and the current to 1A, we have a 14w peak power and 7w average power during the turn-off time. If the PWM frequency for the amplifier is about 50kHz, then the period is 20µs, and a turn-off time of 1µs would result in dissipating 350mW in the nFET. That’s not too bad—at 50°C/W junction-to-ambient, it is only a 17.5°C temperature rise (of course, that thermal resistance assumes that the transistor is on a copper pad on a PC board, not sitting in a breadboard). But if the turn-off time is 2µs and the PWM frequency is 100kHz, we’d have 1.4W dissipated and a 70°C temperature rise, which won’t damage the transistors, but may make them hot enough to melt the plastic on the breadboard or burn someone’s finger.
Last year, by using the two comparators in the package to drive the pFET and nFET separately, we could just barely get the nFET shutoff to be fast enough. The problem of choosing appropriate pullup sizes is fairly tricky, especially as the students have not seen any models of FETs and have no notion of the Miller capacitance and gate charge. I gave them a bunch of gnuplot scripts to try to plot out what the effect of various choices would be, but it ended up being mainly cut-and-try work, fiddling with the resistor sizes and the power-supply voltage to keep the transistors from getting hot. I was trying to simplify the pullup design part of the lab yesterday when I ran into the problem that the new nFETs may be slower to turn off than last year’s and that there may not be a reasonable design point for the students to find.
I’ve been struggling with finding a workaround that I can test in the next week, while teaching the students about class-D amplifiers and supervising their pressure-sensor instrumentation amp labs. Here are the ideas I’ve come up with so far:
- Try the same basic design as last year, and see if I can get a power supply voltage and pullup resistor settings that work. I’ll have to do this in the lab on campus, because I don’t have a power supply at home that provides the same voltage ranges.
- Replace the AOI518 nFET with one that has a lower input capacitance, such as the PSMN022-30PL,127. The gate charge at VGS of 4.5v is 4.4nC, about half that of the AOI518.
- Replace the open-collector comparator with one that has push-pull output, like the TLC3072, which can provide ±20mA current (more than the LM2903, even before we allow for the current through the pullup resistor).
- Add a driver chip that is intended for driving a pair of FET transistors, like the FAN7382, which can provide very fast rise and fall times even into 1000pF loads. But the driver chips are intended for two nFET transistors, and the charge pump for the high-side driver would be difficult to explain in this course and requires external components (diodes, resistors, and capacitors) that the students would have no idea how to choose.
- Use an H-bridge or half-H-bridge chip instead of having students design the power stage with FETs. Most are designed for controlling motors, and don’t give timing specs that would tell me whether they could handle a high enough PWM frequency for audio output.
Currently I’m leaning towards using the TLC3072 comparator. Eliminating the pullup design simplifies the design process for the students, and the 20mA capability should be able to discharge the gate charge sufficiently fast. The data sheet claims rise and fall times for a 1000pF load as 250ns and 150ns (for a 5v signal—it is not clear how the rise and fall times change with power-supply voltage, though I’d expect a roughly linear relationship). So for a 16v power supply (the largest allowed), the fall time for driving the AOI518 gate might be as much as 1µs, which should be fast enough. We could even add a resistor from the AOI418 gate to its source, to pull the transistor off faster at the cost of not turning it on as fully or as fast.
I think I’ll order some TLC3072 chips and some PSMN022-30PL,127 nFETs, so that I should be able to make a working class-D amplifier this week. There isn’t time to have the lab staff order stuff, so this will come out of my pocket. I’ll have to order the parts today in order to get them in time to test the circuit before the class has to do the lab a week from Tuesday.
I’m also going to be late getting the lab handout to the class, since I’ll want to test the circuit before finalizing the handout. I really wanted to get the handout to the class tomorrow, since we’ll be covering class-D amplifier principles in lecture tomorrow. I might end up doing what I did last year—giving a handout on time and handing out an addendum later with updates.
The time spent yesterday on this lab handout has put me way behind schedule—I still haven’t done the grading for the weekend nor written up the quiz for Wednesday’s class. I missed going to see the broadcast of the National Theatre of London’s production of King Lear on Thursday because of lab running so late, and I missed the rebroadcast this morning, because of being so far behind on the work for the course. Oh well, I’m depressed enough about the problems I’m facing with the lab that seeing something as bleak as King Lear would probably not have been good for me.