Yesterday, in the last lecture before the long weekend (hence before they start wiring their Class-D power amplifiers), I covered three topics:
- open-collector outputs. I had hoped to avoid that this year by switching to the TLC3702 comparators, but I couldn’t get the TLC3702 comparators to work with the FETs, so I went back to using the LM2903 comparators that the students got in their parts kits. Because I had already cut the open-collector information from the lab handout, I had to cover it in lecture, and I’ll have to write an addendum to the handout today.
- LC filters for the loudspeaker. This was a pretty rushed job. I didn’t even have time to get them to derive the LC filter behavior with no load (the standard voltage divider formula becomes , which goes to infinity at and 0 at DC and infinite frequency. Instead I pointed them to a gnuplot script that they needtomodify to see how much power the LC filter delivers to the loudspeaker at different frequencies, with different choices of capacitor (no choices for them on the inductor—it is a 220µH 0.252Ω AIUR-06-221 inductor).
The output of the gnuplot script looks something like this:
- Block diagram for the class-D amplifier. I had originally planned to spend almost the entire lecture having the students develop the block diagram, but the addition of almost 45 minutes on open-collector outputs and review of the FET driver stage left me with little time for the block diagram. I did get some participation from the class in developing the diagram, but almost entirely from one student. I felt bad about presenting, rather than getting them to participate in creating the block diagram, but they had to have a block diagram to do their more detailed design over the weekend.One important point I that I emphasized, based on common problems on the second quiz, is that a block diagram is not a simple pipeline, but can have merging and splitting. The class-D amplifier has merging of voltage generators for DC bias with the signal path and merging of the triangle wave generator with the signal path.
One good thing came out of the block diagram discussion: in putting together the design they had the output of the preamp centered at 3v but the input of the comparators centered a 0v. I could point out that putting range information on the signal lines allowed them to catch this error early (before even doing the schematic). Most of the class was able to come up with the standard solution for changing the C bias: adding a high-pass RC filter. I don’t know whether they can choose a corner frequency appropriately, but we’ll see that on Tuesday.
I didn’t get a chance to teach them about real power, either, which the LC script computes. I’ll have to go over that next Wednesday, between the two halves of the lab. There is a writeup of the concept in the lab handout, but my experience has been that students in this class don’t learn from written material.
I’ve also told the students that they need to get all their required “REDO” assignments turned in by Wednesday. It seems that this year’s class does not have the time-management skills to handle open deadlines—they keep putting off redoing the assignments. Given that they sometimes don’t fix the assignments sufficiently when they turn them in again, leaving the assignments to the last week is really dangerous. Next year I’ll have to make one-week deadlines for redoing the assignments, though I can be generous about extending deadlines on request.
Overall, the lecture was way too rushed, because of the extra coverage needed for open collectors. Next year I’ll have to make sure to allow 3 lectures for the class-D power amp, which means not having it on the week with Memorial Day. I’ll probably want to move Quiz 2 a little earlier also, so that it isn’t the week before the class-D power amp.