The power-amp lab went quite smoothly today—just about everybody got a class-D power amp working and a couple of groups wired their sup to a headphone plug and played music from their cell phones. They were impressed at how loud the amplifiers were (though they were only producing about 4W of music, and their speakers could go to 10W or 15W, depending which model they got).
The biggest problems I saw in helping students debug was careless wiring—often because students had not bothered to make complete schematics including pin numbers and every power connection. Connecting power up incorrectly was common. Another common problem for students who did multi-sheet schematics (not recommended for such a small circuit), was having discrepancies at the boundaries between the sheets (like leaving out the high-pass filter needed for recentering the output of the pre-amplifier at the same voltage as the triangle wave). A number of students got confused between the lowest power rail and ground (especially since the LM2903 data sheet calls the low power voltage to it GND, even though in the student schematics it was connected to the lowest power rail.
Despite my rather awkward lectures on the class-D power-amp, I think that the building and testing went smoother this year—perhaps because I tried having them do a crude-approximation-and-test approach to sizing the pull-up resistors. I think that few groups ended up using the resistor sizes they started with. Most had to make the nFET gate’s pull-up larger and the pFET gate’s pull-up smaller, to make the transistors turn off fast enough. I’ll have to see if I can come up with some design guidance that will make the initial estimates closer, without complicating the design process.
I have to correct something I said yesterday in Last power-amp lecture—I did include a current-vs-voltage graph for the LM2903 comparator! I need to rewrite the prelab to have them use that figure to compute their open-collector pull-up resistors: choose a desired low output voltage, figure out the current at that voltage, then use the voltage drop across the pull-up resistor to size the resistor.
I tried using the digital scope in lab today to get Miller plateau pictures without slowing down the transitions, and I recorded a few with the lower power rail at –6V, the upper power rail at +6V and a 330Ω pull-up resistor to 0V on the open-collector output:
Unfortunately, these tiny little images were all the scope recorded, and they are too low quality as images to put in the book. I’ll have to do it again sometime, with the scope downloading the data for me to plot properly. Unfortunately, the download format is a 3.8Mbyte CSV file, which takes a long time for the scope to download to a flash drive (slow USB 1 speeds, I fear). I did not have the patience to do that today, together with writing scripts to ignore the meta data and plot just the real data. I saved one file, which I’ll use for script writing, and some time later go back and record the transitions again.