# Gas station without pumps

## 2017 April 10

### Electret microphone hysteresis

Filed under: Circuits course,Data acquisition — gasstationwithoutpumps @ 09:05
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In attempting to determine the I-vs-V characteristics of an electret microphone, I stumbled across a phenomenon that I’m still having difficulty explaining.  What I was looking for was a plot like this one:

I-vs-V DC characteristics for an electret microphone. The linear and saturation regions are nicely distinguished and there is little noise.

In previous years I had collected the data with PteroDAQ, but this plot was done with my Analog Discovery 2, which combines both the function generator and the data acquisition. Because I was in a bit of a hurry, the first time I tried doing the characterization, I used a shorter period for the function generator, and got a somewhat different plot:

The hysteresis observed here was unexpected. The loop is traced clockwise, with the upper curve for increasing voltage and the lower curve for decreasing voltage.

At first I thought that the effect was a thermal one, like I saw when characterizing power MOSFETs, but a thermal phenomenon would get more pronounced at slower sweep rates (more time to heat up and cool down), while the hysteresis here could be reduced by sweeping very slowly. Also, the hysteresis did not rely on running large currents—the mic was dissipating less than 1mW at the most, and changing the voltage range did not change the hysteresis much.

My next conjecture was a capacitive effect, which I tentatively confirmed by either adding a capacitor in parallel with mic (increasing the hysteresis) or a capacitor in parallel with the 5.1kΩ sense resistor (which reduced the hysteresis or even reversed it).

I tried playing with the frequency of the excitation waveform, to see what happened to the hysteresis:

This pretty plot shows the transition from nearly DC (the curve that looks like the first one of the post) to something that looks almost like a resistor, with current going up linearly with voltage, as the frequency is increased.

Because the hysteresis did not seem to depend on the amount of the sweep, I picked a voltage well into the saturation region (4V), and tried doing a Bode plot of impedance for the mic for a relatively small signal (±1V). I then fit the Bode plot with an (R1+C)||R2 model:

The parallel resistor corresponds to the slope of the DC I-vs-V curve around a bias of 4V. The model fits the data so well that the curve for the data is hidden by the model curve.

I also tried a Bode plot for a DC offset of 2V and an amplitude of ±300mV:

Like with the 4V DC bias, I got an extremely good fit with the (R1+C)||R2 model. The parallel resistance is different, because the slope of the I-vs-V plot is a little higher (so smaller resistance) at 2V than at 4V.

Because the network tool in WaveForms 2015 provides phase information as well as magnitude information, I did my fit first on magnitude, then on phase. The phase fitting was also extremely good:

I show only the 2V phase plot here—the 4V one is similar, though the biggest phase shift is -56.5° at 3.5V, rather than -45.1° at 4.6 Hz.

So I have an excellent electrical model of the behavior of the electret mic at a couple of different bias voltages, with a simple explanation for one of the parameters of the model. I’m still mystified where the capacitance (about 1.7µF) and the other resistance (about 8kΩ) come from. I suppose, theoretically, that they could be tiny surface mount components inside the can of the mic, but I see no reason for the manufacturer to go to the trouble and expense of doing that. The pictures of a disassembled mic at http://www.openmusiclabs.com/learning/sensors/electret-microphones/ suggest a rather low-tech, price-sensitive manufacturing process.

Incidentally, until I looked at those pictures, I had a rather different mental model of how the electret mic was assembled, envisioning one with a simple membrane and the electret on the gate of a MOSFET. It seems that the electret is put on the surface of the membrane and a jFET is used rather than a MOSFET. After thinking about it for a while, I believe that a jFET is used in order to take advantage of the slight leakage current to the gate—the gate will be properly biased as a result of the leakage. The OpenMusicLabs post showed a 2SK596 jFET (an obsolete part), which has an input resistance of only 25—35MΩ, easily low enough to provide bias due to leakage currents. If the gate is biased to be about 0V relative to the source, then the jFET is on by default,

The 1.7µF capacitance is huge—many orders of magnitude larger than I could explain by a Miller effect (unless I’ve screwed up my computations totally) as all the capacitances for the jFET are in the pF range, and the multiplier for the Miller effect should only be around 5–50 (1–10mS times the 5.1kΩ load), so I’m still at a loss to explain the hysteresis. I checked to see whether the effect was something in my test setup, by replacing the mic with a 10kΩ resistor, but it behaved like a 10kΩ resistor across the full range of frequencies that I used for testing the mic—this is not some weird artifact of the test setup, but a phenomenon of the microphone (and probably just of the jFET in the mic).

I suppose I should buy a jFET (maybe a J113, that has a 2mA saturation current with a 0V Vgs) to see if other jFETS have similar properties, connecting the gate to the source with a small capacitor to imitate the electret biasing.

Incidentally, while doing this experimenting, I found a bug in the Waveforms 2015 code: if you sweep the frequencies downward in the network analyzer (which works), on output to a file the frequencies are misreported (as if they had been swept upward). I reported this on the Digilent Forum, and they claim it will be fixed in the next release. The time between the report and the acknowledgement was only a few hours, which is one of the fastest responses I’ve seen for a software bug report. (They didn’t say when the next release will be, but they’ve had several since I bought my Analog Discovery 2 four months ago, so they seem to be releasing bug fix versions rapidly.)

## 2017 February 6

### Hysteresis oscillator is voltage-dependent

Filed under: Circuits course,Data acquisition — gasstationwithoutpumps @ 20:42
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Today in class I did a demo where I tested the dependence of the frequency of my relaxation oscillator board on the power supply voltage.

The demo I did in class had to be debugged on the fly (it turns out that if you configure the power supplies of the Analog Discovery 2 to be low-speed waveform channels, then you can’t set them with the “Supplies” tool, but there is no warning that you can’t when you do the setting), but otherwise went well.

One surprising result (i.e., something else that hadn’t happened when I tested the demo at home on Sunday) was that the frequency appeared to go up instead of down when I touched the capacitive touch sensor.  This I managed to quickly debug by changing my sampling rate to 600Hz, and observing that the 60Hz frequency modulation was extreme at the podium, taking the oscillation frequency from 0Hz to 3MHz on each cycle.  Grounding myself against the laptop removed this interference and produced the smooth expected signal.

Anyway, when I got home I was much too tired to grade the lab reports turned in today (I’ve got a cold that is wiping me out), so after a nap and dinner, I decided to make a clean plot of frequency vs. power-supply voltage for my relaxation oscillator.  I stuck the board into a breadboard, with no touch sensor, so that the capacitance would be fairly stable and not too much 60Hz interference would be picked up.  I powered the board from the Analog Discovery 2 power supply, sweeping the voltage from 0V to 5V (triangle wave, 50mHz, for a 20-second period).

I used the Teensy LC board with PteroDAQ to record both the frequency of the output and the voltage of the power supply.  To protect the Teensy board inputs, I used a 74AC04 inverter with 3.3V power to buffer the output of the hysteresis board, and I used a voltage divider made of two 180kΩ resistors to divide the power-supply voltage in half.

When I recorded a few cycles of the triangle waveform, using 1/60-second counting times for the frequency measurements, I got a clean plot:

At low voltages, the oscillator doesn’t oscillate. The frequency then goes up with voltage, but peaks around 4.2V, then drops again at higher voltages.

I expected the loss of oscillation at low voltage, but I did not expect the oscillator to be so sensitive to power-supply voltage, and I certainly did not expect it to be non-monotone.  I need to heed my class motto (“Try it and see!”) more often.

Sampling at a higher frequency reveals that the hysteresis oscillator is far from holding a steady frequency:

Using 1/600 second counting intervals for the frequency counter reveals substantial modulation of the frequency.

This plot of frequency vs. time shows the pattern of frequency modulation, which varies substantially as the voltage changes, but seems to be repeatable for a given voltage. (One period of the triangle wave is shown.)

Zooming in on a region where the frequency modulation is large, we can see that there are components of both 60Hz and 120Hz.

I could reduce the 60Hz interference a lot by using a larger C and smaller R for the RC time constant. That would make the touch sensor less sensitive (since the change in capacitance due to touching would be the same, but would be a much smaller fraction of the total capacitance). The sensor is currently excessively sensitive, though, so this might be a good idea anyway.

## 2016 December 30

### Ultrasonic rangefinder with Analog Discovery 2

In Loudspeaker impedance with Analog Discovery 2, I looked at the impedance of  various loudspeakers including an ultrasonic transducer. Today I looked at shaping pulse bursts for driving an ultrasonic transmitter to get shorter received pulses with an ultrasonic receiver.  I’ve done this before using custom programs on a Teensy 3.1 board (see Ultrasonic rangefinders arrived), but I wanted to see what I could do using just the waveform generator on the Analog Discovery 2.

I measured the magnitude of the impedance of the transmitter (using either a 120kΩ resistor or a 1nF capacitor as a known impedance), then looked at the transmitter+receiver characteristics for frequencies around the resonances.  I’ve marked the peak received resonances on the impedance plot.

The impedance is approx 2.2nF, with 3 apparent resonances.

The primary resonance is around 40kHz, and is the frequency that the transmitter is designed to operate at.

There is a secondary resonance around 54kHz, though it is considerably weaker than the 40kHz resonance.

The third resonance, around 330kHz does not provide a very strong signal for the receiver.

I tried two tests using the 40.445kHz resonance. In one, I used the simple waveform generator to produce a 40445Hz square wave, then used an 8ms wait and a 148.3µs run time, to produce bursts of 6 square waves. I set the idle output to the offset (0v) and used a 5V amplitude.

In the other test, I used the same wait and run times, but used the “custom” waveform to set up a signal that inverted the last 3 of the 6 periods (so that the half periods were `+-+-+--+-+-+`. This was fairly easy to set up by generating the 6 periods, then altering them by multiplying by a single period of a square wave. I could have created much more complicated bursts, but this pattern was enough to see the capabilities of the scope.

By triggering the scope on the signal sent to the transmitter (using channel 1), I could average 1000 sweeps to get a very low-noise view of the signal. (I can trigger on the waveform generator itself, freeing up one of the scope channels, but then I can’t average—I think that the averaging relies on interpolating get precise timing of the trigger.)  For plotting, I subtracted off the DC bias (fitted before time 0), as 60Hz interference caused a moderate offset to the signal even after averaging.

The bursts start out the same, but the simple 6-cycle burst results in the received waveform growing for 14 or 15 cycles, while the 3+,3- burst grows for 6–7 cycles and decays very quickly.

I tried some longer and shorter bursts, with the expected result that longer bursts resulted in stronger signals with a longer received burst width. Doing 8 cycles followed by 8 cancelling cycles seemed to produce a reasonable length burst with a fairly strong signal, but I did not explore variants much.

I still think it might be possible to use the phase information to get higher resolution than the approx 7.9mm wavelength, but identifying which pulse of the return waveform is which remains a problem, particularly if there is a complicated reflecting surface that superimposes several differently delayed pulses.

## 2016 December 28

### Headphone impedance with Analog Discovery 2

Filed under: Circuits course,Data acquisition — gasstationwithoutpumps @ 22:41
Tags: , , ,

In Loudspeaker impedance with Analog Discovery 2, I described measuring the impedance of loudspeakers with the network analyzer function of the Analog Discovery 2. In this post, I looked at some new Panasonic headphones that I got myself for Christmas (Panasonic RP-HJE120-PPK In-Ear Headphone, the best-seller on Amazon and the same model my son has, though in a different color).

I have figured out how to use the Waveforms 2015 software a little better now, so I can compute the magnitude of impedance as an extra column in the output (using the “Custom One” optional calculated channel).  This cuts down slightly on the missing metadata from the data files, though I really wish that they would do a dump of the instrument settings as comments at the beginning of the file.

The headphones had essentially the same curves whether in the ear or not in the ear, so I am just plotting the in-ear electrical characteristics.

The headphones are fairly well fit by a simple model: a resistor in series with an inductor.

Zooming into the audio region shows surprisingly little variation in the impedance over the whole audio range. There is a small resonance peak around 2.6kHz, but it is small and broad, nothing like the resonance peaks of loudspeakers.

I had some problems with repeatability of measurements, with curves jumping 0.5Ω up or down, but preserving their shape. I think that the problem is with poor contacts in the breadboard I was using, as I had the same problems earlier characterizing nFETs. The resonance peak around 2.6kHz corresponds roughly with the peak of information content in speech, so slight enhancement there is probably perceived as improved audio quality over a completely flat spectrum. But the enhancement here is tiny, so it may just be the result of flattening the spectrum as much as feasible.

The noise in the measurements probably reflects the small signal levels—I had an 18Ω resistor in series with the 16Ω headphones, and an amplitude of only 25mV across the pair, which gives me only 8.3mV RMS at the headphones.  That means that only 4.2µW of power is being used to generate the sound.  Panasonic claims a sensitivity of 96dB/mW, so 4.2µW should be about 72dB SPL (remember that dB is $10 \log_{10}$ of a power ratio, and $10 \log_{10}$ of an amplitude ratio). The 72dB seems about right for the loudness.  The headphones can supposedly handle 200mW, which would be 119dB—easily loud enough to cause permanent hearing loss.  Perhaps I should have students test their preamplifiers with earbud headphones instead of loudspeakers—the 24mA limit would give 9mW, which would be quite loud in a headphone.

The R+L model does not fit at high frequencies all that well, and the phase relationships are not what one would expect of a pure R+L model:

The phase only gets to 60°, while a true inductor in series with a resistor would have reached 90° and done so somewhat sooner.

Overall, I’m impressed at how flat the impedance is over the audio range. I don’t know how good the headphones are acoustically (especially as my hearing seems to be really down in the 4kHz–8kHz range—signals seem louder to me at 9kHz than at 5kHz), but I’ve no complaints about them so far.

## 2016 December 27

### FET I-vs-V with Analog Discovery 2 again

In FET I-vs-V with Analog Discovery 2, I plotted Id vs. Vgs curves for an nFET:

The Ids-vs-Vgs curves do not superimpose as nicely as curves I’ve measured with PteroDAQ. I don’t yet understand why not.

Yesterday, I played with sweeping the power supply (Power waveform generator).  In this post, I used that capability to plot Id vs Vds curves for different gate voltages (Vgs) of a different nFET (since the AOI518 is an obsolete part).  The setup is the same as for the previous test—the function generator is connected to the gate, the power supply to the drain load resistor in series with the nFET whose source is connected to ground, and the two oscilloscope channels monitor the voltage across the load resistor and across the nFET.  The difference is that I use the power-waveform option to put a 1Hz triangle wave on the power supply, but put just a DC offset (AC amplitude 0V) on the function generator output, so that the gate voltage is constant as the drain voltage is adjusted.

The saturation regions are well plotted up to Vgs=2.7V. I averaged 10 or 20 scans for each of these curves, to reduce quantization noise for small voltages or small currents.

I got quite different results when I removed and replaced the nFET from the breadboard—the breadboard contacts seem to have a variation of about ±0.05Ω in resistance, which is much larger than the on-resistance of the nFET when fully on. I took measurements with a wire between the source and drain to estimate the wiring resistance, but wiggling the wire produced very different results.

In the next graph, I tried subtracting off the wiring resistance to get the on-resistance, but I’m really quite dubious about the measurements smaller than 0.5Ω, because of the unrepeatability of the bread board contact resistance.

The numbers here look good (close to the spec sheet), but repeating the measurements could result in ±0.1Ω, which makes the Ron measurements for fully on transistors rather useless.

By using a smaller power resistor, I could probably get saturation currents for slightly higher gate voltages, up to the current limit of the power supplies in the Analog Discovery 2, but better on-resistance measurements would require a better jig for making low-resistance contacts to the FET.

By using a much larger resistor, I could measure low currents more accurately, which would give me a better idea of the leakage currents—I don’t really believe the measurements for Vgs=2.1V, because the current appears to decrease with increasing Vds, which is probably an artifact of measuring a small difference in voltage with a large common-mode signal.

I tried using larger resistors to measure the saturation currents, but the results varied a lot depending on what size load resistor is used. I believe that the difference is due to temperature changes from self-heating. If I sweep out to larger Vds voltages (using a smaller load resistor, hence smaller IR drop across it), but about the same saturation current, I’m dissipating more power in the transistor, so making it warmer. This appears to increase the saturation current. Reducing the range of the voltage with the same load resistor drops the curve down, just as increasing the load resistor does. I suspect that proper measurement requires a jig that holds the transistor at a nearly constant temperature, as well has having very low contact resistance.

The saturation current seems to vary by about ±10% as I change load resistors. The effect is most likely thermal—note that using a smaller voltage sweep for Vgs=2.3V and Rload=51Ω resulted in almost the same curve as Rload=270Ω, because the power dissipated was about the same.

Note that the thermal explanation also works for explaining why the superposition does not work well for the Id vs Vgs plots—at lower load resistances, more power is dissipated in the transistor, and it gets warmer, shifting the current curve upward.

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