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2018 January 17

Long weekend, little done

Filed under: Circuits course — gasstationwithoutpumps @ 10:01
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Last weekend was a long weekend (Martin Luther King Day on Monday), and I briefly had fantasies of getting a lot of stuff done.  The trouble is I never settled on exactly what it was I would get done, so I ended up doing very little.  I read science fiction, I slept a lot, I tinkered with my book a little bit, I got the live Christmas tree out of the house, and I adjusted the brakes on my bike. but that’s about it.

The main addition to the book wasn’t even a very important one—this picture:

Some of the most common packages for FETs.

We used to use TO-220 and TO-251 packages for the class, since that is how power FETS are most commonly packaged, but the power FETs are getting expensive (the cheapest ones keep getting discontinued—maybe they were cheap because they were end-of-life, or maybe they were discontinued because there wasn’t enough profit at the low price point).  We had problems last year with TO-251 packages not staying in the breadboards—the springs seemed to pop the leads out rather than grabbing them.

This year we’ll be using the SOT-23 transistors, which are much cheaper, and soldering them to a breakout board.  I’m a little worried about how many of the students will have trouble with hand-soldering the small parts.  They’ll have had a little more practice soldering by then, so I’m hopeful that it will go ok.

The other changes to the book were mostly typo fixes for problems found by my students.  The students have been very good this year at reporting problems to me, and there were a lot more typos than I expected (averaging about 1 every 3 pages).  So far they’ve not pointed out any substantive errors, though there was one omission that I’ve fixed—it seems that some students have not heard of raster image formats, and thought I was trying to say “faster image formats”, so I’ve added a couple of paragraphs about image formats.  The changes that I’m making this quarter will be in the next release, which will probably be in March, during spring break.

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2018 January 3

SOT-23 FETs for half H-bridge

Filed under: Circuits course — gasstationwithoutpumps @ 20:53
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In Breakout board for SOT-23 FETs, I gave the schematic and layout pictures for a half H-bridge breakout board using SOT-23 surface-mount FETs.  The boards arrived today, 12 days after I ordered them. The boards cost $4.86 plus $23.79 shipping, but I had them panelize the design, and they sent me 13 copies instead of 10, so I ended up with 546 boards (instead of 420), making a cost of 5.24¢ each.

One of the panelized board. The panels are just separated with V cuts, so the corner rounding is not very good, but there is some, and I did not end up with sharp corners after cutting off a row of boards with tin snips.

With the transistors, capacitor, and headers, each half H-bridge will cost under 40¢ in 100s—much less than the approximately $1.37/half H-bridge that separate TO-220 FETs cost.

Today I tried soldering on a  PMV20XNER nFET (14.9¢ in 100s) and SSM3J332R pFET (12.4¢ in 100s), a 5-long right-angle header, and a 10µF ceramic capacitor. I wanted to do this with pretty much the same tools the students would have, so I did not use a board holder nor cross-lock tweezers (both of which would have made the job slightly easier).  My technique was simple:

  • Put the board face up on the bench.
  • Place one FET using sharp-pointed tweezers.
  • Tape the FET and the drain side down with a tiny piece of blue painters’ tape.
  • Solder the source and gate.
  • Remove the tape.
  • Solder the drain.
  • Repeat for the other FET.
  • Put the headers through the holes (from the component side).
  • Flip the board over and solder the header.
  • Put the header pins into a breadboard at the edge of the board.
  • Insert the capacitor from the component side.
  • Prop the breadboard up so the solder side of the board is exposed.
  • Solder the capacitor in place and trim its leads.

Soldering the first board went well.  The second one was a little harder (I had a bit of hand tremor), but still only took a few minutes.  Having made the lands huge (big enough for wave soldering) made alignment fairly simple—I did not have to be exact.

I tried one FET without the trick of taping the FET in place—that did not work at all, as the FET moved completely off the pad when I tried to solder.  I had to remove solder from the board with a solder sucker and redo the FET using tape.

Here are the front and back of the boards before and after populating, along with the pointed tweezers I used for placing the FETs.

Here is a close-up of one of the two boards I soldered (the one with the worst alignment—see the pFET at the top left).

I spent the rest of the afternoon checking that the boards were OK.  I used essentially the same setup as I used for Ron vs Vgs for pFETs and nFETS, with a 24Ω load and a 10V ramp that gradually turned the transistor off.  Because the test was the same, I plotted the results together with the old results:

The PMV20XNER transistor has a much lower threshold than the other nFETS I’ve looked at, but a comparable Ron to the other power nFETs.

The SSM3J332R pFET also has a low threshold voltage and the on resistance is in the same range as others we have used in the past.

It looks to me like the half-H-bridge will be a perfectly reasonable way for the students to get FETs for the class-D amplifier.  The current will be somewhat limited by the power dissipation of the pFET, but with an 8Ω speaker and 0.1Ω pFET, the power to the loudspeaker should be 80 times the power lost in the pFET, so the 10W limit on the loudspeaker should be reached well before the half H-bridge overheats.

Update: the EAGLE and Gerber files for this board are available at https://users.soe.ucsc.edu/~karplus/bme51/pc-boards/

2017 December 22

Breakout board for SOT-23 FETs

Filed under: Circuits course — gasstationwithoutpumps @ 23:25
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After a discussion in the comments of Ron vs Vgs for pFETs and nFETS with Michael Johnson, I decided to design my own breakout boards for SOT-23 surface-mount FETs, with the possible use of them in the class-D amplifier lab in place of the through-hole TO-220 FETs we’ve been using.

I picked a couple of 30V FETs (one nFET, one pFET) whose data sheets indicated that they would have adequately low on-resistance with a gate voltage of only 2.5V (–2.5V for the pFET), so that the FETs could be controlled by a 3.3V logic signal with no problems.  I ended up picking PMV20XNER for nFET (14.9¢ in 100s) and SSM3J332R for pFET (12.4¢ in 100s).

Although the drain-to-source voltage is allowed to go to 30V, the gate-to-source voltage is more limited (±12V for both the nFET and the pFET).  That should be adequate for anything we do in the course, as our maximum power supply is ±5V, so we shouldn’t see any voltage differences bigger than 10V.  (I could have saved a few cents by using 20V FETs instead of 30V ones, maybe.)

Because the students use the FETs in an H-bridge, I decided to make my breakout board be a half H-bridge, with an nFET, a pFET, a bypass capacitor, and 5 right-angle header pins:

The schematic is quite simple. (The diodes are the body diodes of the FETs.)

The layout took me a while, because I wanted to make as much heat sinking as I could get on a small, cheap board.  The standard footprint for a ST-23 allows a thermal resistance of about 120 K/W. I did not push too hard though, because even with ideal layout, the SOT-23 packages still have terrible thermal conductivity (about 90 K/W)—essentially all the heat is being conducted through the thin drain pin.  (The SSM3J332R reports even worse numbers: 300 K/W with minimum footprint and 120 K/W with a square inch of copper.)

Solder side of the board. Visualization provided by https://gerber-viewer.easyeda.com/

Component side of the board. Visualization provided by https://gerber-viewer.easyeda.com/

My board is not nearly a square inch of copper—the entire board is only 15mm × 12.5mm, and only half of that is used for heatsinking the drains. I used the back of the board for radiating heat and provided thermal vias around the drain pads to connect the front and back. The footprint for the pads is one provided by the manufacturers for wave soldering—I thought it would be easier for had soldering than the much smaller pads used for reflow soldering.

The gate connections are on the outside, the source connections just inboard of them, and the shared drain in the middle.  The board is basically symmetric with respect to nFET and pFET, but I labeled the two sides so that there would be less variation in how students soldered them up.

The bypass capacitor is close to the FETs (much closer than the students ever got on a bread board), so we should see less noise injection back into the power rails than we’ve seen in the past. The resistance of the source and drain traces adds another 5mΩ of resistance to the H-bridge, which is not too bad—the beardboard probably adds more like 50mΩ.

If I understood their website correctly, I should be able to get 10 copies of the tiny board panelized in a 6×7 array (so 420 boards after I cut them apart) for only $4.90 from Smart-Prototyping.com.  Of course, I’m in a hurry, so I ended up paying an extra $23.79 for shipping with DHL, so the order costs $28.69, or <7¢ a board.  I also ordered 10 40-pin right-angle male headers (enough for 80 boards) for $4.11 from AliExpress, raising the price to 12¢ a board.

With the transistors, each half H-bridge will cost under 40¢ in 100s—much less than the approximately $1.37/half H-bridge that the separate TO-220 FETs cost.

The difference in cost is not important for the course ($2 a student), so my main consideration is whether the students will learn more by doing some surface mount soldering with a fixed cMOS half-H-bridge design or by continuing to wire up separate transistors on the bread board (making the usual student errors of getting the pinout wrong or general miswiring).  There is still plenty of room for error on the half H-bridge: swapping transistors, getting 2 nFET or 2 pFET instead of one of each, putting the whole board in backwards to short the power supply through the body diodes, …. .

The SOT-23s can’t dissipate quite as much heat as the TO-220s, but we’ll probably not have much heat to dissipate in reasonable designs.  With a 5V supply, 8Ω load, and 73mΩ on-resistance, the power dissipation in the pFET should be only about 28mW and the nFET even less—way less than the 500mW or so that I expect the boards to be able to handle.  Shoot-through current is mainly what the students will need to worry about, as that can get quite high with the low on-resistances of both the nFET and the pFET.

I’ve ordered the boards and parts to test out using the SOT-23 FETs and half-H-bridge boards.  If they work out well, I’ll probably rewrite the class-D lab to have students do a little surface-mount soldering (SOT-23s are about the simplest intro).

2017 December 20

Ron vs Vgs for pFETs and nFETS

Filed under: Circuits course — gasstationwithoutpumps @ 22:16
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My son has joked that I don’t have an electronics hobby—I have a hobby of characterizing transistors.  There is an uncomfortable amount of truth in that assertion—I spend more time measuring things with my tools than building things.

Today I wanted to characterize all the nFETs and pFETs that I have, so that I could choose the right ones for the class-D amplifier lab in spring quarter—also to see whether the on resistances were as low at the data sheet claimed.

I used just the Analog Discovery 2, some 10W resistors (to make the 24Ω load), and a Schottky diode as a fly-back diode (because the power resistors have a fairly large inductance).  I chose the load so that the power supplies on the Analog Discovery 2 would not exceed their 2.1W limit. In the past I’ve used a wall wart with a higher current limit to do power FET tests, but I figured that the 400mA test current was enough for what I wanted to do today.

The setup for measuring the pFETs.

I swept the gate voltage with a 1-second ramp, turning the transistor on abruptly but off slowly.  I determined the gate voltage just from the timing, as I used the two oscilloscope channels to measure the drain-to-source voltage Vds and the drain current Id.

The results of measuring the pFETs. Only the low-threshold IPP45P03P4L11AKSA1 turns on at –3.3V. The funny knees in the curve around 10Ω are where the test jig switches from being roughly constant current (~400mA) to having a current dependent on Ron (Vds is no longer nearly 0).

To get the on resistance, I fit the data from –10V to –9V with a straight line and used that straight line at Vgs=–10V to get the value.

IPP45P03P4L11AKSA1 is no longer available, but NTD2955-1G and IRFU9024NPBF still are—it’s too bad that they aren’t really turned on at —3.3V.  Perhaps I should get myself some IRLIB9343PBF pFETS and test them—they supposedly have a very low threshold and reasonably low Ron. They cost a bit more, but they do have the longer leads that allow breadboarding.  I looked at the data sheet for the IRLIB9343PBF, and it does not look very promising—the resistance shoots up at about –5V.  The SPP15P10PLHXKSA1 looks more promising on the datasheet.

I have a lot more nFETs than pFETs, so I tested all of them also. The circuit is essentially the same as for the pFETs, just swapping the voltage sources and turning the fly-back diode around. I also changed the direction of the ramp, so that I was still turning on the FET abruptly and off slowly.

The nFETs clustered more than the pFETs did, with three outliers.

One of the outliers, IPU50R950CEAKMA1, is a high-voltage nFET. It has both a high threshold and a high Ron, but it can handle much larger voltages than the others—it was intended for switching rectified mains voltages (about 350V), but I’ve not used it yet. The other two outlier nFETs (2N7000TA and TN2106N3-G) are not power FETs—I had to switch to a 48Ω load to measure them, to avoid putting too much current through them.

The AOI514 and AOI518 parts are obsolete. The NTD4858N-35G is still available, but it has very short leads, and we had problems last year with them popping out of the breadboards. The NTD5867 is now only available as a surface-mount part, but the PSMN022-30PL,127 is still available and has long leads that work in the breadboard.

2016 July 16

pFET Ron_vs_Vgs

Filed under: Circuits course,Data acquisition — gasstationwithoutpumps @ 22:25
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In Possible new FET lab for electronics course, I said

I next need to look at whether a similarly simple pFET circuit will work for them to measure Ron  for pFETs.

That turned out to be even easier than I expected.  All I needed to do was change the source wire from Gnd to 3.3V, the voltage divider for the gate to report the voltage halfway between Vg and Vs, and the flip the function generator leads to drive Vgs negative instead of positive (also flipping the polarity of the electrolytic capacitor at the same time).

I had to adjust the gnuplot scripts somewhat to fix the computations, as Vgs is now -2*($4-$2) rather than 2*$2 and Ron is now (Rload*($4-$3)/$3) rather than (Rload*$3/($4-$3)), with the three channels still connected to Vg, Vd, and 3.3V.

With a drain-source short the wiring resistance came out to 24mΩ this time.

I have 3 pFETs:

  • NTD2955-1G (39.87¢ in 100s) used this year in class
  • IRFU9024NPBF (53.13¢ in 100s)
  • IPP45P03P4L11AKSA1 (66.93¢ in 110s)
The two cheaper pFETs are very similar, but the bigger one (IPP45P03P4L11AKSA1) has a much smaller threshold voltage and a much low on resistance.

The two cheaper pFETs are very similar, but the bigger one (IPP45P03P4L11AKSA1) has a much smaller threshold voltage and a much low on resistance. 

Would it be worth specifying IPP45P03P4L11AKSA1 for the class next year?  The class-D amplifier could run at a lower voltage if the pFET threshold is not so large, which would make testing easier—lots of students were confused by the behavior they got when they used a modest supply voltage that did not allow the pFET to turn on.

The gate-to-source charge plus gate-to-drain charge for the IPP45P03P4L11AKSA1 pFET is 16–24nC (that’s about how much charge is needed on the gate to finish turning on the transistor), while for NTD2955-1G it is only about 11nC, so IPP45P03P4L11AKSA1 will take longer to turn on (and to turn off, though that depends on the total gate charge).  At 10V, the total gate charge is 42–55nC vs 15–30nC for the NTD2955, so the turn off time is probably also about doubled.

The doubling in time will not matter much in the H-bridge circuit we used this year, since we were using 74HC04 inverters to drive the gates, with one inverter dedicated to each gate—the gates were being driven very fast, and a doubling in time would not affect performance.  It would have been a huge problem when we were trying to drive the gates directly from the output of the comparators.

Although I like the IPP45P03P4L11AKSA1 better for computer-controlled circuits, for the class-D amplifier it probably doesn’t offer enough of an advantage to justify the extra 54¢ per student. It might be worth having a difference in packaging between the nFET and the pFET, though, as several students swapped pFETs and nFETS in their breadboards this year. Because the IPP45P03P4L11AKSA1 comes in a larger TO220 package, the visual difference may be enough to justify the increased price.

 

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