Gas station without pumps

2015 July 25

Noise from PteroDAQ KL25Z

Filed under: Circuits course,Data acquisition — gasstationwithoutpumps @ 15:31
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In a series of posts (most recently More on measuring PteroDAQ KL25Z input impedance), I’ve been measuring the input impedance of my various ways of measuring AC voltage, and having some trouble getting a reasonable value for using the PteroDAQ as a measuring device.  In the most recent post, I noted that hardware averaging seemed to make the measurements worse, not better, when the input impedance was high.

I decided to map out how bad this measurement error was, by changing the source resistance and seeing how the voltage measurement changed. I picked a low frequency (55Hz) with a high sampling rate (6001.5Hz), so that aliasing was not an issue.

The voltage measurements are fine up to a source impedance of 10kΩ without averaging, but only to 1kΩ with 32× hardware averaging.

The voltage measurements are fine up to a source impedance of 10kΩ without averaging, but only to 1kΩ with 32× hardware averaging.

My conjecture about the problem with the 32× averaging was that the KL25Z sample-and-hold circuitry was injecting interference onto the pin, and that too high a source impedance did not provide sufficient current to eliminate this noise before the next sampling of the pin.

I tried fixing the problem by adding a small capacitor between the pin being measured (PTE0) and ground. The idea is that the capacitor can short out the high-frequency interference, using charge from the capacitor to cancel the noise rather than from the source. If the capacitor is too large, then the low-pass RC filter of the source impedance and the capacitance will reduce the signal, but if it is too small, then the sample-and-hold will be confused by the noise from the previous sample. With the 55Hz signal and a 100kΩ source impedance, I tried a number of capacitors, looking for the one that would maximize the voltage reading with 32× hardware averaging. I settled on 470pF, which would give a corner frequency of 3.39kHz (approximately my Nyquist frequency).

Putting in a 470pF capacitor to bypass the noise from the sampling helps when there is no averaging, but not so much when there is averaging.

Putting in a 470pF capacitor to bypass the noise from the sampling helps when there is no averaging, but not so much when there is averaging.

With the 470pF capacitor, the source resistance can get as high as 100kΩ before the noise injection becomes a problem, when not using hardware averaging (at the 6kHz sampling rate—higher sampling rates would start seeing problems at lower impedances. In general, I think that sampling period should be at least 3.5 times the RC time constant of the source resistance and the added capacitance. For single-ended, 16-bit measurements with short sample times, the KL25Z hardware averaging has a period of 25 ADC clock cycles and PteroDAQ is set up to use a 6MHz ADC clock, so the samples are at 240kHz, which would suggest a maximum source impedance of 2.5kΩ for a 470pF capacitor using hardware averaging. This seems consistent with the measured data.

I realized this morning that I did not need to just conjecture the noise on the pin—I could stick an oscilloscope on it and measure it. I used a 47kΩ series resistor (so that the 1MΩ || 10pF load of the Bitscope oscilloscope would not make a huge difference) and a 10 Hz input from the FG085.  I set the PteroDAQ sampling rate to 3750Hz, so that there would be about equal time for the 32 samples and for recovery between them.  I captured single traces and got fairly consistent results.  Here is an example:

This trace at 50mV/division and 20µs/division shows the 240kHz noise from the sample-and-hold circuitry for the first half, and the much smaller noise when not sampling for the second half.  This trace was done without the 470pF capacitor.

This trace at 50mV/division and 20µs/division shows the 240kHz noise from the sample-and-hold circuitry for the first half, and the much smaller noise when not sampling for the second half. This trace was done without the 470pF capacitor.

The noise injected by the sample-and-hold circuitry is about 190mV peak-to-peak with the 47kΩ resistance, or about 4µA.

Adding the 470pF capacitor reduces the peak-to-peak noise to about 16mV or 340nA, but there is enough of a bias to the noise that the error is much larger, as seen by the slow decay back to the correct value in the following trace:

At 10mV/division and 20µs/division, this trace shows both the reduction in noise from using a 470pF  capacitor and slow recovery to the correct voltage at the end of the 32 samples. The time constant for 470pF times 47kΩ is about 22µs, about 5.3 times the sampling rate (or about 20 times longer than desirable for accurate reading).

At 10mV/division and 20µs/division, this trace shows both the reduction in noise from using a 470pF capacitor and slow recovery to the correct voltage at the end of the 32 samples. The time constant for 470pF times 47kΩ is about 22µs, about 5.3 times the sampling rate (or about 20 times longer than desirable for accurate reading).

The injection of noise back into the circuit being tested is a particularly nasty property for test equipment to have. One could avoid it by adding a unity-gain buffer before the pin, which would have three good effects:

  • The input impedance would now be the impedance of the op amp, which can be in the 10GΩ range (for the cheap MCP6004 op amps we use in class)
  • If there was noise from the microprocessor, it would not be injected into the circuit being tested.
  • The source impedance for the analog-to-digital converter would now be around 40Ω (for the MCP6004 op amps), so all these noise problems would go away.

There is one downside to using a unity-gain buffer: you get some non-linearity near the power rails, so the range of useful operation is reduced somewhat.

So when using the PteroDAQ, it is important to pay attention to the source impedance.  When the source impedance, R, is high, one can either

  • add capacitance to reduce the switching noise of the sample-and-hold circuitry (resulting in an RC time constant >3.5 times the sampling period, which can be user-specified (no averaging), 4.1667µs (single-ended channels), or 5.6667µs (differential channels) on the KL25Z; or
  • add a unity-gain buffer to separate the input from the pin.

The noise consideration is a bigger constraint on operation than the input impedance of the analog-to-digital converter pins, which made my attempts to characterize the input impedance somewhat quixotic.

2013 February 7

Thirteenth day of circuit class and first op-amp lab

If you’re wondering what happened to the 12th day of circuits class, that was discussed in Quiz too long and too hard. On Wednesday, I did some do-now problems to check on some basics and to provide a hook for the day’s topics.  I asked for the voltage gain (Vout/Vin) for the following circuits:

First question: a voltage divider they are familiar with, and which almost everyone got right.

First question: a voltage divider they are familiar with, and which almost everyone got right.

do-now-2-2013-feb-6

A different voltage divider circuit, stressing the fact that voltage is between two points. Only about half the class got this, because I had not given enough examples of voltages other than to ground. Students who had the correct answer had two different ways of getting there: starting from Ohm’s Law, or simple proportional reasoning. I pointed out that a third way would be to compute the voltages of the two voltmeter leads using the voltage divider formula.

do-now-3-2013-feb-6

A reminder of the one op-amp circuit they’d seen (last Friday). Only about half the class remembered this one, so I did another derivation of it using a finite-gain amplifier instead of an ∞-gain op amp, showing what happens as gain goes to infinity. I think that I should do more of that, since many of the students are uncomfortable with infinity.

do-now-4-2103-feb-6

A hook for the main material of the day: non-inverting amplifiers. Only one student correctly guessed the gain of this circuit (one of the top students in the class—I think he “cheats” by reading the assignments when they are assigned to be read—I wish more students would do that).

After reviewing the unity-gain buffer, but before getting into the non-inverting amplifiers, I made a digression into what would happen if we swapped the two inputs to the unity-gain buffer.  Doing the algebra for the gain computation with a finite-gain amplifier and taking the limit, we again get a solution where the output voltage is equal to the input voltage.  I then stepped them through what would happen if there was a small perturbation in the input, which does not result in the amplifier settling down to the new value, but keeps getting bigger until the output slams into one of the power rails.  I used this to discuss positive feedback and the difference between a stable and an unstable design, but did not give them any tools for analyzing stability other than hand-simulating what happens if you add a small perturbation to the input.

Finally I got to the non-inverting amplifier, and stepped them through the reasoning behind the gain computation.  I think most of them followed it, though some are still disturbed that the voltage divider in the circuit has “Vout” and “Vin” labels reversed from how they are used to thinking of voltage dividers.  I have to wean the students away from the notion that formulas contain sacred variable names, and into thinking about them as having slots that get filled according to context.  That is, I have to have them attach semantics to the formulas, rather than relying on name-based pattern matching.

I was originally going to do inverting amplifiers as well, but I think I’ll leave those until next week.  I also decided not to have the students try to do a single-supply design for their first op-amp lab, but to use a dual-supply design, which is a little simpler conceptually.  I’ll have to rewrite the lab handout for next year, as I had originally planned to do a single-power-supply design.  I realize now that is too ambitious for the first op-amp assignment.  There was a mention in the lab handout of a DC-blocking capacitor on the output, but that is not needed in the dual-supply design, so just confused a couple of the students.

After the non-inverting op amp, I introduced them to the notion of block diagrams, and together we developed the following block diagram:

Block diagram for audio amp

Block diagram for audio amp

We didn’t do it all at once, of course, and it took some prompting to get the various parts all there. We started easily enough with the microphone and the loudspeaker, then added the amplifier. I had to prompt them a bit to remember that the microphone was best thought of as having a current output, but that the amplifiers we knew how to design were voltage amplifiers. Since their second lab converted the microphone current to a voltage, they got the I-to-V converter pretty quickly. We tried to guesstimate the gain needed by saying we wanted the loudspeaker to swing rail to rail (±3V) on a loud input, and I asked the students what they had measured on lab 2 as the AC voltage swing. A couple of students had something in their lab notebooks. I pointed out (again) the value of keeping good lab notebooks, since you never know what detail you might need later on. We used one of the estimates to pick a gain of about 50 for the amplifier.

I then pointed out a problem: the I-to-V converter they used in Lab 2 had a 1V DC offset, and if they put that into the amplifier, they would pin the output at the upper power rail, since it couldn’t go to 50V. After a bit of reminder that DC was a frequency of 0Hz, they came up with the need for a high-pass filter, and could even remember the voltage divider circuit to get it. But figuring out the corner frequency stumped them, because none of them remembered the frequencies of human hearing. Eventually someone came up with 20Hz to 20kHz, which goes a bit higher than humans hear, but is a typical stereo specification. We only cared about the low-frequency end anyway. I pointed out that knowing what sort of signal one was dealing with was an essential part of the design process, and one of the first questions they should ask when doing a design. They eventually settled on 10Hz as a reasonable corner frequency, though anything between 1Hz and 30Hz would probably do, given that their speakers have very poor bass response anyway (they are very fine 10W speakers for about $1 each, but they are still small speakers).

I think that I’ll continue to have the development of the block diagram as an in-class discussion (not try to put it into the lab handouts), so that the students can develop it themselves with guidance from me, rather than being handed it.  This decomposition of a design problem into smaller easily solved problems is one of the essential parts of engineering, and most of the bioengineering students have not had much experience with it.

I ordered them to pair up right away and come to lab with designs already done and ready to implement and debug. I think that too many of them have been under-prepared for labs, having just looked over the lab handouts the night before. From now on, I’m going to make sure they do some serious work on each lab before they touch wire to breadboard on it. (This will be particularly important on the last two labs, where they’ll be soldering the instrumentation amplifiers—unsoldering components is no fun at all.)

Today’s lab went great! Everyone got a working audio amplifier (generally with a gain of 40× or 50×), and could see the gain on a dual-trace oscilloscope (superimposing the signals at the mic and the output with different volts/division setting, which was particularly satisfying for showing the gain of 50).  They also observed clipping of the output with loud input signals, and the inability of the op amp to drive the 8Ω load of the loudspeaker all the way (it has only a ±23mA output capability).  I reassured them that we would design an amplifier later in the quarter capable of delivering loud sounds.

A few students came in with non-functional designs, but they were all quite close, and a few minutes of discussion at the whiteboard about how the resistors for the non-inverting amplifiers needed to be designed got them back on the right track when the circuits they built failed. I refused to look at designs until they had wired them up—I’m making “Try it and see!” the mantra for the class.  Perhaps we should put it on the t-shirts.

Some students also had a little trouble converting their schematics to wires on the board, but a little debugging and tracing wires was enough for me to point out discrepancies between what they showed me in the schematic and what I saw on the breadboard.  This was enough to get them back on track without my having to touch their boards.

I thought that this lab would be one of the toughest ones so far, but it turned out be the smoothest sailing.  Everyone finished on time with working circuits demoed!  Perhaps the op amps are not as hard as I expected for them, perhaps the design assignment the day before left them more prepared, perhaps they’re beginning to get the hang of things now after a somewhat rocky start.  Whatever the reason, I was really proud of what they managed to do today.  This is only lab 5 for them, and they are already doing more in the lab than the EE 101 students achieve by the end of the quarter!

Next week they’ll do a “tinkering” lab without a clearly specified objective, but with some strong constraints. In the course of the lab, they’ll learn about phototransistors (though not all the characteristics of them) and FETs as switches.  The lab is very thrifty, making use of the hysteresis oscillator board that they soldered up for the capacitance-touch sensor as a component without modifying what is on the board. They’ll also learn about a different style of engineering: tinkering, where one plays around with stuff to see what can be done.  I don’t think that most of them have had much opportunity to tinker in the past, and it is an excellent way to develop the mental models that allow one to reason about circuits without tedious calculations.  (Some calculations may still be needed, of course.)  Some of them may get frustrated with the  somewhat undirected nature of the play, I’ll undoubtedly get a headache from loud squealing of loudspeakers at high frequencies, and someone may burn a finger on an overheating FET, but I think that next week’s lab may be the most fun one of the quarter, and it should prepare them well for the class-D power amplifier later in the quarter.

Tomorrow I’ll start on group-work quiz corrections (the last student is taking the quiz in the morning), and have them try to finish the quiz corrections over the weekend. If the quiz corrections are problematic still, we’ll use Monday for more group work on them and possibly some Socratic lectures (they’ve had all the material they need—they just need some guidance on how to apply it).

More likely, on Monday we’ll do some work on gnuplot, so that students who need to redo one of the labs that involve model fitting will have a better handle on what they are doing.  If we do that, I’ll ask students to bring in their laptops, so that they can do some interactive work on gnuplot scripting.  I thought that the first script I gave them would be sufficient example, but I didn’t realize at the time the difficulty they would have in generalizing the example, so I’ll step them through a worked example, with them gradually building a script that does what they need. I hope to be able to address the scope-of-variables problem that I think is tripping some of them up, as well as detecting other conceptual stumbling blocks.

Although I started this week very depressed about the quiz results and having sleepless nights worrying about how to modify my teaching to get the concepts across, I’m now feeling very positive about the class.  The op amp lab went great, and I see ways that I think have a very good chance of getting the students comfortable with the material.  In about two weeks, I’ll give them another quiz (similar to the one that was so painful for everyone on Monday, with perhaps a couple of op amp questions), with the reasonable expectation that they’ll be able to nail it.

2013 February 2

Eleventh day of circuit class

Filed under: Circuits course — gasstationwithoutpumps @ 01:02
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In today’s class, I planned a discussion of amplifiers.  Because several students were late getting to class, I started with an informal request for suggestions for the phototransistor and FET lab.  I mentioned some of the labs I had rejected (like the MIT lab on DNA melting or the pulse sensor), and mentioned some of the rather boring ones I had come up with.  Students expressed an interest in a sound-based lab, so I promised to look into that.  I have a couple of ideas to try out this weekend, and I’ll blog about them in a separate post once I’ve tried them out.  I have to work quickly though, as I need to get out the lab handout by Wednesday, to give the students a week to read it.  I also have a pile of lab reports to grade and a quiz to write, so this weekend will be pretty busy.

I started today’s amplifier talk by comparing digital and linear amplifiers.  We had already discussed digital amplifiers for the hysteresis lab, so I only had to remind them of that and compare the different notions of gain (both being the slope of a line on the Vout vs. Vin graph).  I mentioned that there are other amplifiers besides voltage amplifiers, but that we would concentrate of voltage in-voltage out amplifiers.

We then covered inverting vs. non-inverting amplifiers, and I got someone to guess correctly that an inverting linear amplifier had negative gain and a downward slope on the Vout vs. Vin graph.

I then moved to differential amplifiers, getting them to derive the Vout=gain(Vp-Vm) formula from what they would want a differential amplifier to me. We then discussed power supplies, input impedance, and output impedance.  It was clear that the students are still struggling with what it means in terms of current to have a very high or very low impedance, but eventually the group managed to converge on the idea that a large input impedance and a small output impedance were desirable. I then declared by fiat (since the idea makes no sense until you use it for a while), that the building block we wanted was a very high gain amplifier (gain over 1000).

Somewhere in there (I don’t remember the order exactly 10 hours later), we had a digression to discuss what the 1x/10x switch on the oscilloscope probes meant. I was pleased that I could remember the oscilloscope input specs (10MΩ in parallel with 25pF), which are conveniently printed on the scopes (doing me no good when the scopes are in a different building from the classroom). Now that I get home and can look at my scope, I see that it is really 1MΩ and 25pF for the Kikusui COS5060 on my bench. Checking on-line, the COS5041 scopes in the lab have the same input impedance. The Tektronix digital scopes are 1MΩ in parallel with 13pF. So I’ll have to tell students to correct their notes: the scopes are 1MΩ input resistance, not 10MΩ, and the 10x switch puts in a 9MΩ resistor, not a 90MΩ resistor.

We did not talk about the other characteristics of real amplifiers, but started looking at ideal op amps, with infinite input impedance, zero output impedance, and infinite gain.  I did (repeatedly) say that real circuits can’t achieve these ideals, and that we need to check after doing a design, whether the real op amp chips are close enough that the simplifying assumptions are reasonable.  I also reassured them that for the low-frequency designs they’ll be doing in the class, the simplifying assumptions are almost always good.

I did not say that the chips we are using have a gain-bandwidth product of 1MHz, because they would have had no idea what I was talking about, but for the pressure sensor and the EKG lab, where the top frequency is around 100Hz, we have much more gain available than we need.  I did mention that we should have a gain around 1000 at 1kHz, and that was plenty.  I will have to discuss slew rates later this quarter, since the class-D amplifier does not work efficiently with the low slew rates of the op amps and needs a high-speed comparator chip.

I had the students derive the first rule of linear design with op amps: that the inputs have the same voltage.  This is a consequence of having infinite gain but only a finite voltage output.

After giving them the idea of an op amp, we had only a few minutes left, so I gave them the simplest of op-amp circuits, which needs no extra components:

The unity-gain buffer (or voltage follower)—the simplest of op-amp circuits.

The unity-gain buffer (or voltage follower)—the simplest of op-amp circuits.

I managed to talk them into believing that the output is the same voltage as the input, not just from the first rule of op amps, but by talking them through what would happen if the input went up, and how the output would have to go up until the difference was zero again. I then tried to get them to think about why one might want an amplifier that wouldn’t change the voltage at all. I tried getting them to compare the effect of a voltage source with a large series resistor driving a resistive load (the voltage divider that is the main theme of the course), with the same source driving the unity-gain buffer which drives the source. I reminded them of oscilloscope probe discussion, where we had talked about the advantages of having the extra series resistance in the probe, despite the smaller signal.

I think that one or two students understood the point of the unity-gain buffer, but I’m not sure that most of them got it. We were out of time, though, so I couldn’t go back and do another approach.

On Monday, we’ll have the quiz. If there is time, I’ll continue the discussion of op amps, but I suspect that too many of the students will have put off reading anything about op amps until after the quiz, so there might not be much point until Wednesday. I also suspect that I’ll make the quiz too long, and we’ll end up using up the whole period on it. I am going to try to scaffold the quiz, with easy questions leading up to harder ones, so that the students are primed with the right ideas for the harder questions. I just hope that is enough to get them past their panicked search for formulas to memorize that cause so many of them to freeze whenever they encounter a slightly unfamiliar problem.

I really want the students to do some of the reading on op amp circuits before Wednesday, so that I can be clarifying and reinforcing ideas for them, rather than having to be their first encounter with the ideas.  I think that today’s difficulty in getting any response from the students (even when I was asking for guesses) was in part due to them not having read any of the amplifier material yet.  They’ve certainly been much livelier in earlier classes.

On Wednesday, I’ll want to have a brainstorming session on the design they need to wire up and debug in Thursday’s lab, so we’ll have to cover non-inverting feedback amplifiers and how to compute their gain (voltage dividers!) fairly quickly. I’ll want them to bring copies of the lab handout to class, so that they can double-check the design constraints and goals as we do the brainstorming. They’ll need to add DC-blocking capacitors (high-pass filters) between the mic and the amplifier, so this might be a very good time to introduce them to block diagrams. It might also be a good time for small group discussions (groups of 3 or 4 students), designing together what each of the blocks needs to contain.

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