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2015 May 27

Last power-amp lecture

Filed under: Circuits course — gasstationwithoutpumps @ 21:20
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I gave the last of the lectures on class-D power amps today, starting by answering a question about how they could hook up a phone or iPOD to the power amp.  Basically, the line output replaces the microphone and preamp circuit, before the high-pass filter that recenters the voltage, which is convenient, as they have mostly been building the preamp on a separate breadboard, with only two wires over to the class-D power stage. I also had the students figure out how to combine a left and right signal into a single monaural signal (as with most of the questions in the class, the answer is a voltage divider).

For most of the lecture I talked about how to decide whether the pull-up resistors for the open-collector comparators outputs needed to be bigger or smaller. I gave up on doing anything mathematical, and went for more cut-and-try approach (many, but not all, of the students already made mathematical estimates in the prelab, sometimes reasonably, sometimes off by moderate amounts).

The basic idea is simple: look at the output high voltage and the output low voltage. The output high voltage is whatever the other end of the resistor is connected to—for the pFET gate this is the same power rail as the pFET source is connected to, so it guaranteed to be high enough to turn the pFET off, while for the nFET gate this can be either ground or the positive power rail, which are guaranteed to turn the nFET on, as long as the power supply voltages are high enough. The output low voltage results from the voltage drop across the pull-up resistor, so is V_{hi} - R I_{sat} if that voltage is enough above the bottom power rail for the comparator output transistor to be saturated. The saturation current for the LM2903 they are using is guaranteed to be at least 6mA on the data sheet, but in practice is typically larger.

One thing I did not do was include a current-vs-voltage graph for the LM2903 comparator, though I had created one two years ago—I’ll have to put it in the book!

There are two regions of operation for the open-collector output of the LM2903.  In the saturation region, the current goes up slowly with voltage (as about V^0.15, while in the "linear" region, it goes up as about V^1.5).  The transition occurs when VOL is about 0.25 V, so we are almost always in the saturation region.

There are two regions of operation for the open-collector output of the LM2903. In the saturation region, the current goes up slowly with voltage (as about V^0.15, while in the “linear” region, it goes up as about V^1.5). The transition occurs when VOL is about 0.25 V, so we are almost always in the saturation region.

I probably should have presented this graph (I’d forgotten I had made it) and then justified using a saturation current of 10–16mA (maybe 12mA for the nFET driver where we want the low output to be well below the nFET threshold voltage and 16mA for the pFET driver, where we may not need to get anywhere near the lower power rail).

So the main constraint on the pull-up resistors is that they must be large enough to make the VOL voltages low enough to turn on the pFET, -I_{sat} R < V_{th(p)}, and turn off the nFET, V_{OH}-I_{sat}R < V_{-supply} + V_{th(n)}.

But making the resistors large slows down the upward transitions, making the pFET turn off slowly and the nFET turn on slowly, so we really want to make the resistors about as small as we can while reliably turning the pFET on or the nFET off. (This is an oversimplification, because the on-resistance of the FETs drops as we turn them on more firmly, so there is an incentive not to use the smallest possible values—but that tradeoff gets complicated without either measuring actual power consumption or doing extensive simulation.)

I then showed the students how to get the turn-on or turn-off time by looking at the gate voltage of the FET when the FET was switching a load (using the loudspeaker as a load, since they don’t have 8Ω 10W resistors). The time is from when the gate starts to change until the end of the Miller plateau, and I showed them the slowed down transition plots that I made for the book:

Here are the gate and drain voltages for an AOI518 nFET, slowed down by adding a series resistor to the gate signal and a large capacitor between the gate and drain.  I slowed it down so that I could record on my low-speed BitScope USB oscilloscope—students can see high-speed traces on the digital oscilloscopes in the lab.  The Miller plateaus are the almost flat spots on the gate voltage that arise from the negative feedback of the drain-voltage current back through the gate-drain capacitance.

Here are the gate and drain voltages for an AOI518 nFET, slowed down by adding a series resistor to the gate signal and a large capacitor between the gate and drain. I slowed it down so that I could record on my low-speed BitScope USB oscilloscope—students can see high-speed traces on the digital oscilloscopes in the lab. The Miller plateaus are the almost flat spots on the gate voltage that arise from the negative feedback of the drain-voltage current back through the gate-drain capacitance.

I should probably take some of the 9–10 hours I’ll be spending in the lab tomorrow to try to make plots without the slowdown, using the high-speed digital oscilloscopes in the classroom. The oscilloscopes can save screen images onto flash drives with a single button push, but I’ve not yet figured out how to get data off of them in a usable format—I guess I’ll need to look in the manual (there is a copy cabled down in the lab).

I also mentioned the problem of overshoot when using only one FET (rather than the cMOS arrangement) to switch an inductive load, and showed how to use a flyback diode to provide a return path for the current that continues to flow from the inductor.  With the cMOS arrangement, the built-in body diodes of the FETs provide good flyback diodes, with each FET’s body diode protecting against the overshoot when the other FET turns off.  I should probably have some plots of that overshoot also for the book.

One thing I did not get enough time for in class is talking much about the LC filter design for removing the high-frequency PWM signal and delivering just the audio signal to the loudspeaker.  I showed them the basic idea, and pointed them to the gnuplot script I’d written for them (where they need to plug in their own loudspeaker model), but I did not get a chance to demo it.  I think that only the top third of the class got enough to be able to choose the capacitor (I only have one size of inductor available—I should probably buy a few other sizes). I covered the LC filter better last year (see post on that lecture), but I did a little better with real power this year.

Overall, it was not a great lecture—too much material and too sloppily done, so that I’m not sure that any of it got through clearly.  Being so short on sleep for the past couple of weeks has really been killing my performance.  Still, I think it was a little better than last Monday’s lecture, which was probably the worst of the quarter.

2015 May 26

Third power-amp lecture and first half of lab

Filed under: Circuits course — gasstationwithoutpumps @ 23:07
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On Friday, I almost finished covering the class-D power amp, covering comparators, open-collector outputs, how to create PWM signals from a comparator and a triangle-wave generator, and an overall block diagram for the whole class-D amplifier (developed together with the students).  I even got in some mention of the LC filter used to improve the audio quality. It was a rather packed lecture, but I thought it went fairly well.

I spent almost the entire Memorial Day weekend grading (except for going to see a broadcast of the Stratford Festival’s production of “Anthony and Cleopatra”, which I thought was a good production, and doing a little shopping and food prep, since my wife was sick all weekend). Despite the time spent grading, I didn’t finish clearing my backlog, still having 6 redone assignments left to grade when I burned out on Monday night.

There was no Monday lecture, so I did not collect the prelab assignments—instead I told the students to keep them to work on the lab itself.  I had the students start at the microphone end and build the pre-amp first.  The pre-amp is a slightly more complicated version of the amplifier that they built 3 weeks ago—the extra complication being that the preamp has to be driven from a single-rail power supply. Some students got the preamp built and working in an hour, most got it working in two, but a few took longer. None took the six hours that the first amplifier lab took.  (One of the groups that took the longest was one I expected to be a good team, but they had accidentally connected the power backwards to their op-amp chip and had apparently burned out one of the amplifiers—I helped them debug and, not finding anything wrong with their design or wiring, finally suggested that they try replacing the chip, which made the circuit function.)

After building the preamp, the next step for them was to hook up the preamp to comparators for comparison with a signal from the triangle-wave generator.  I suggested that they build the preamp on one breadboard and the power-stage on a separate breadboard, with only two wires connecting them to convey the voltage from one board to the other (the power supplies are separate).  A number of students had problems with figuring out why they needed two wires—I think I’ve got to make a bigger point of voltages always being differences and rely less on the “difference to ground” shorthand that we usually use when talking about voltages.

After getting the comparators working with pullup resistors on the open collectors, I had students attach either the nFET or the pFET with the speaker as load, to record the turn-on and turn-off time of the FETs.  The easiest way to get those times is to look at the gate voltage and measure from when the gate voltage begins to change until the end of the Miller plateau (which is when the drain has finished its transition):

Here are the gate and drain voltages for an AOI518 nFET, slowed down by adding a series resistor to the gate signal and a large capacitor between the gate and drain.  I slowed it down so that I could record on my low-speed BitScope USB oscilloscope—students can see high-speed traces on the digital oscilloscopes in the lab.  The Miller plateaus are the almost flat spots on the gate voltage that arise from the negative feedback of the drain-voltage transitions back through the gate-drain capacitance.

Here are the gate and drain voltages for an AOI518 nFET, slowed down by adding a series resistor to the gate signal and a large capacitor between the gate and drain. I slowed it down so that I could record on my low-speed BitScope USB oscilloscope—students can see high-speed traces on the digital oscilloscopes in the lab. The Miller plateaus are the almost flat spots on the gate voltage that arise from the negative feedback of the drain-voltage transitions back through the gate-drain capacitance.

Several of the students were getting rather severe ringing on one transition of the comparator, even with no load but the pullup resistor—others got clean fast edges (20ns rise and fall times) without a load, and the expected 500ns—2µs on- and off-times with an FET and 8Ω or 6Ω loudspeaker loading the FET. I don’t know why some students got severe ringing and others did not.

One problem that I need to address in class tomorrow is the large overshoot that all the students will get when turning off an FET driving a loudspeaker—without the flyback diode provided by the other FET, the voltage goes way past the power rail. Since this is a serious concern in driving inductive loads (and mentioned in my book), I think that it is worth a few minutes of lecture.  I might need to add some more illustrations to the book to improve the explanation of driving inductive loads.

In the lab today, one or two groups managed to get both the nFET and the pFET checked, and ran the full cMOS driver, getting the desired power amplification without much shoot-through current (maybe 20mA on average). I did have to tell students to use long wires for the speaker, as feedback squeal if a real problem if the speaker is too close to the microphone.

One group ran into an expected difficulty: using too small a pullup resistor for the comparator driving the pFET gate, they didn’t manage to turn the pFET on. I think that they also used too small a resistor for the pullup driving the nFET, and were unable to turn it off. Luckily, they had set the current limits for the power supply fairly low, and so the nFET did not get too hot.

I plan to talk tomorrow about the Miller plateaus, and about adjusting the pullup resistors to make sure that they are as small as possible for the pFET (barely turning it on at the low end) and large enough for the nFET to turn the nFET off quickly. The pullup resistors need to be different sizes for different power supply voltages, so I’m going to recommend to the few students who complete the lab early that they try to do a series of designs for different power supply voltages.

I also need to talk tomorrow about the LC filter and how to use gnuplot to design it. That means I’ll have to schlep in my laptop again tomorrow.

I got the last chapters of the book updated, and released the last draft of the quarter to the students tonight.  I’m hoping that the EKG assignment won’t be too difficult for them—I’ll have to go over 2-op-amp instrumentation amps on Friday, as I’m expecting them to build their own instrumentation amp for the EKG assignment.

2015 May 23

Interesting observation with PteroDAQ

Filed under: Circuits course,Data acquisition — gasstationwithoutpumps @ 19:35
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In the lab reports on the optical pulse monitor lab, one pair of students made an interesting observation: the DC offset of the signal they were observing with the PteroDAQ data acquisition system seemed to be periodic with a period of about 46 seconds. In the electronics course, they learn early on about aliasing, because we usually sample our signals at 10Hz, 15Hz, 20Hz, 30Hz, or 60Hz so that the AC noise picked up and amplified can be aliased to DC and result in a DC offset, rather than making a mess of our signals.  There is a large 60Hz interference in the pulse-monitor lab, as students are generally doing transimpedance amplifiers with a total gain of around 100MΩ, so 10nA of stray current at the input results in a 1V output signal.  The aliasing trick gets rid of that 60Hz signal in the output, as long as the amplifier is not clipping as a result of the interference.

They attributed the periodic offset to slight errors in the 20Hz or 30Hz sampling frequency, so that the 60Hz interference was not being completely canceled, but was being aliased to 0.022Hz.  They did not have a very long recording, so I was not sure whether their explanation was correct—it was plausible, but so was random drift, and I wanted more evidence.

So I set up my own amplifier picking up 60Hz line noise in my house, and I did my own recording at 30Hz:

This waveform looks like a time-reversed and slowed down version of the signal I saw on the oscilloscope.

This waveform looks like a time-reversed and slowed down version of the signal I saw on the oscilloscope.

Sure enough, there is clear evidence of aliasing. The period is about 93.7s. That would be an error of having 1 sample too few every 2811 samples, an error of 356 parts per million. That would be a huge error for the crystal-controlled timer on the KL25Z board (the ABM3B crystal on the FRDM KL25Z board has a ±50ppm error or better—the ABM3B F3C marking does not correspond to the part numbers on the ABM3B datasheet, so it is possible that the F3C codes for a tighter spec). I also considered a software error, setting the counts wrong for the interrupt timer. It is unlikely to be an off-by-one error in the programming, though, since the number of counts with the prescaling of the timer should be 8333 (not near 2811), and the separate timer that reports the intervals is not showing any drift in the timing of the interrupts. So I think that the PteroDAQ is doing 30Hz sampling too accurately to explain the aliasing, if the line frequency is really 60Hz.

The beat frequency is about 0.0107Hz, which would correspond to the 60Hz line frequency actually being around 59.9893Hz (a bit too slow, so that we sample slightly earlier in each period, to get the time reversal). Is that in spec for the power grid? According to “Legal and Technical Measurement Requirements for Time and Frequency” by Michael A. Lombardi  [Measure 1(3):60–69  Sept 2006, http://tf.nist.gov/timefreq/general/pdf/2125.pdf],

The 60 Hz frequency delivered to consumers is sometimes used as the resonator for low-priced electric clocks and timers that lack quartz oscillators. The legally allowable tolerance for the 60 Hz frequency is only ±0.02 Hz, or 0.033 % [17], but under normal operating conditions the actual tolerance is much tighter.

So being off by 0.01Hz is within spec for the line frequency, but the 46s period that the students saw was out of spec, unless the frequency spec is for a long-term average and not for a window of only a few minutes.

Note that the ±50ppm for the KL25Z crystal is good enough for a lot of purposes (like USB signalling), but is not nearly as tight a tolerance as a digital wristwatch, which is typically ±6 ppm (there is no legal requirement in the US for wristwatch accuracy).  Of course, people who really care about the time use GPS, which has an accuracy of 6 parts per 1014 (in the satellite—the accuracy is considerably less by the time it gets to the receiver).

2015 May 21

Limited Edition Kinetics have arrived!

Filed under: Uncategorized — gasstationwithoutpumps @ 22:55
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I received my order of Limited Edition Kinetic lights from Futuristic Lights today! I suspect that others who ordered Limited Edition sets will be getting theirs in the mail very soon also (the company started shipping on Tuesday—I got mine fast because I’m in the same county as they shipped from).

Here is what comes in the set: 2 gloves, 10 lights with cases, diffusers, and batteries, a folded instruction card, and a black drawstring bag with the company logo printed subtly on it.

Here is what comes in the set: 2 gloves, 10 lights with cases, diffusers, and batteries, a folded instruction card, and a black drawstring bag with the company logo printed subtly on it.

Note that there are 64 items that need to be assembled for each set: 2 gloves, 10 Kinetic boards, 10 cases, 10 diffusers, 20 batteries, 10 battery tabs, a drawstring bag, and an instruction card.  Even working very efficiently, it is probably going to take them a couple of weeks to get all the preorders shipped.  There’s no way that they could have afforded a standard “fulfillment” service for doing the shipping, as those generally set their prices based in large part on how many items need to be assembled for each order.

Component sourcing, manufacturing, packaging, and shipping have all been much more difficult than they anticipated, and they are shipping at the end of their estimated delivery time (even though they thought that they had allowed lots and lots of extra time—I thought that they would be able to ship in March, which shows how little help I was in anticipating what might go wrong for them). As it is, they are shipping without the boxes they had ordered, because the box printer was taking far longer to print the boxes than they had allowed for (and they hadn’t put a penalty clause in the order for late delivery). I suspect that they won’t be ordering from that box manufacturer again.

The amount that the founders of Futuristic Lights have learned from their first commercial product is amazing (way more than most engineering and business students get in four years of college), and they haven’t lost their enthusiasm for the process—they have already started work on the next 2 or 3 products. For those products, they’ll apply the lessons they learned on the Kinetics—they’ll have more realistic manufacturing lead times and will (probably) be able to reduce the manufacturing costs through better part procurement and different manufacturing partners.

Perhaps even more amazingly, my son has managed to maintain his part in the manufacturing and engineering effort while excelling on a full load of computer science and math courses at UCSB (in Winter quarter he had 24 units, instead of the standard 16, but he decided that the load was too much on top of all the engineering work he was doing for Futuristic Lights and dropped back to a saner load for Spring quarter). So far, most of his courses have been extensions of stuff he has learned partially on his own, and not all-new material. I suspect that courses may be a little more difficult next year as he tackles parts of computer science that he hasn’t already nearly mastered.

For this summer, he’ll be working on new products for Futuristic Lights, except for two weeks of summer Shakespeare with WEST Performing Arts, one week of which will be watching plays at the Oregon Shakespeare Festival in Ashland, the other week of which will be a conservatory with WEST and Santa Cruz Shakespeare.  He’s done both before, and is looking forward to it again this summer.

Pulse monitor lab part 2 and power-amp lecture

Filed under: Circuits course — gasstationwithoutpumps @ 22:18
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Wednesday’s lecture covered a reasonable amount.  I went over PWM again, stressing the key concept: that the relevant value is the average value of the output. I showed the derivation of the average value from the high value, low value, and duty cycle.  I introduced nMOS (and, to a lesser extent, pMOS) field-effect transistors, and showed how they worked as switches, which is the only way we’ll use them.  I introduced both nMOS low-side switches and cMOS output stages, and talked about shoot-through current.

I did not get to comparators, open-collector outputs, and how to create PWM signals from a comparator and a triangle-wave generator, which is the meat of tomorrow’s lecture.

I spent over 9 hours in the lab again today, because I’ve promised the students that I’ll be in the lab 5 p.m.–7 p.m Tuesdays and Thursdays for the rest of the quarter, but the students were done with this week’s lab by 6 p.m.  I think all but one or two of the groups got working pulse monitors.  Debugging was difficult today.  The most common problems were

  • Wires in the wrong holes on the breadboards—usually an off-by-one error.
  • Phototransistor connected up backwards. Students kept thinking in terms of “long lead” and “short lead” and somewhat arbitrarily assigned a positive and negative meaning to them, without going back to the datasheet to see which was the collector and which the emitter.  This was difficult for me to debug, because the phototransistors had wires soldered on and were covered with electrical tape, so I could not see the original wire length nor the flat on the package, and had to trust the students’ claims about which wire was which.  In one case the problem was only debugged after I connected my LED and phototransistor (where I knew the color coding I’d used) to the student’s circuit and saw that the circuit was working.
  • Centering the high-pass filter and second stage of the amplifier at 0V, even though we were using a single-sided power supply, so they needed to make a virtual ground.
  • Swapping the wiring of the LED and the phototransistor.
  • Insufficient gain in the second stage.
  • Difficulty getting appropriate amounts of pressure on the finger to get a good pulse fluctuation.

The students having the most trouble had not prepared a schematic to work from or had very sloppy un-color-coded wiring, or both.  I’ll have to remind students that taking a half hour at the beginning to set things up carefully can save hours of debugging—too many want to dive in and wire up stuff without a clear idea what they are going to do, just hoping that it will somehow get fixed by the group tutor or me debugging their work. I refuse to do debugging for a group without a schematic, and in some cases I gave students some properly colored wire and asked them to rewire the circuit so that it could be debugged.

One student was unable to get a pulse reading from his finger on anyone’s circuit (including mine).  I don’t know what the difficulty was—he attributed it to too much caffeine today, so that he could not hold his finger steady in the block.  I suspect that he might have been pressing down too hard and squeezing the blood out of his finger.  One student even managed to get a pulse  reading through fingernail polish (she was wearing a red polish, which apparently was transparent enough to still work).

I had set up my transimpedance amplifier (which has adjustable gain from 66MΩ on up) with an oscilloscope for students to see what a good signal looked like.  There is a lot of 60Hz noise capacitively coupled in, but I was getting a 0.5V pulse signal with only about 200mV of interference.  I probably want to lower the corner frequency for the low-pass filter, to reduce the 60Hz signal further (one group that had miscomputed their corner frequency had very low interference, but their signal was also attenuated too much—I think that a reasonable compromise position can be found).  Even groups with very high 60Hz interference were able to get clean signals by sampling at a multiple of 1/60th of a second (20Hz or 30Hz, for example)—the aliasing eliminates the 60Hz signal, turning it into a DC offset.  The only ones who ran into trouble with 60Hz interference were ones who had the gain set so high that the 60Hz interference caused clipping, obscuring the pulse waveform added to the interference.

I expected this lab to be a little easier for students than it turned out to be, but I think that several students who had been having trouble with some of the concepts (like the virtual ground) were now getting the idea.  I hope so, as most of what they did in this lab will be directly applicable to the EKG lab in the last week of classes.

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